1. Field of the Invention
This invention relates to error correction for a Read Only Memory (ROM).
2. Prior Art
A large percentage of the defects that cause bit errors in a semiconductor memory are random local defects in individual memory cells rather than global defects that totally wipe out a row or column of memory cells. The ease of correcting defective memory cells depends on the type of memory, that is, whether the memory is a ROM or a RAM. RAMS chips can have defective rows or columns replaced in the testing stages subsequent to fabrication of such chips. RAMs can be built with redundant columns and rows that can be substituted for defective rows and columns by the blowing fuses with a laser beam.
In the case of a ROM, it has been historically, difficult to correct errors after the ROM has been fabricated and is in a testing stage. In a ROM, information is permanently programmed into the ROM cells during initial fabrication so that replacement of all of the cells in a column or row of a ROM die also requires replacement of the specific information stored in each of the ROM memory cells. It would be prohibitively expensive to duplicate all of the specific information fabricated into a ROM cell by blowing a number of fuses for each cell of a defective ROM column or row. For example, in a 4 Meg ROM that has 2048 rows and 2048 columns, replacement of a defective column would require providing 2048 fuses and blowing an average of 1024 fuses. Consequently, using fuses for recovery of defective cells in a ROM die has been thought to be uneconomical.
Other techniques can be used for correcting defective memory bits in a ROM. One such technique is to use a Hamming code for encoding all of the information in a column or row in order. This technique provides data information recovery as well as a certain amount of error, detection and correction capability for each row or column. However, except for special applications where cost in no object, this type of error coding is uneconomical because the area of the ROM chip increases by as much as 30% to accommodate extra bits required by this type of error coding. So for most types of ROM chips, error detection and correction techniques are not used and chip manufacturers simply accept losses in chip yield due to memory cell defects.
Consequently, a need exists for an economic, effective technique for correction of defective bits in a ROM that greatly reduces the number of fuses required to be blown for correction of a defective ROM bit.